Bottom line: rough barrel walls and inner-layer pull-back are usually not a machine positioning problem; they are a mismatch between drill wear and chip load. As one bit runs from hole 200 to hole 3000, the cutting edge stops cutting and starts rubbing, barrel roughness Ra climbs from 1.5 μm to beyond 4 μm, and nail heading with inner-layer separation follows. Tying bit life, chip load and stack height together into one managed set controls risk on 20:1 aspect-ratio boards far better than an extra X-ray step after the fact.
1. Separate the three defect families first
Barrel defects look alike on a cross-section but have entirely different causes, and investigating them as one problem never converges.
- Tearing and gouging: chip load too high or spindle speed too low, chips cannot evacuate, glass bundles are pulled apart instead of cut, and Ra clusters above 3 μm.
- Nail heading and inner-layer pull-back: a dull bit raises axial thrust, pushes inner-layer copper toward the hole axis and tears the copper-to-resin interface — a defect that only appears after plating as a dark slit between barrel and inner layer.
- Entry chipping and burr: thin entry material, fast retract, or an uneven stack leaves a missing section at the entrance, and the plating starts with a notch there.
2. Chip load: fix this number first, everything else follows
Chip load scales with bit diameter and is not set from the machine's maximum capability. The ranges below are practical starting points; take the lower half for glass-rich laminates.
- 0.20 mm bit: 0.008–0.012 mm/rev at 120–150 krpm.
- 0.30 mm bit: 0.012–0.018 mm/rev at 90–110 krpm.
- 0.40 mm bit: 0.020–0.025 mm/rev at 70–90 krpm.
- 0.50 mm and above: 0.030–0.040 mm/rev at 50–70 krpm, with retract speed at least 3× the feed rate.
A 0.30 mm bit through 6.0 mm of board is exactly 20:1, where the chip path is long and evacuation is poor. Such holes need peck drilling — retract every 0.3–0.5 mm of descent to carry chips out. It costs roughly 40% more time per hole but holds barrel Ra within 2.5 μm.
3. Bit life: manage by hole count and by wear land
Hole count alone is not enough, because regrind quality varies widely within a lot. Use both criteria together.
- Wear land width: pull the bit once the land exceeds 0.05 mm; by then cutting has become rubbing and both barrel temperature and resin smear rise together.
- Hole-count ceiling: 3000 holes per bit on standard FR-4; 1500–2000 on Tg 170 °C high-layer-count or heavy-copper boards; 500–800 on ceramic-filled laminates.
- Regrind count: three times maximum, with 5 μm diameter compensation after each regrind; bits beyond three regrinds go to non-functional holes only.
- Sampling cadence: every 500 holes, pull 5 holes for Ra and nail-head checks — far cheaper than sectioning a whole lot.
4. Stacking, entry and backing: leave a path for the chips
A 44-layer board cannot be drilled through in one pass, and how you stack decides the registration offset between the upper and lower segments.
- Stack count: 2–3 panels at normal thickness, total height under 1.6 mm; for 20:1 holes, drill single panels to hold registration offset within 25 μm.
- Entry: 0.2 mm aluminium-backed phenolic entry to suppress chipping at the entrance; avoid plain aluminium sheet, whose debris is pressed into the hole.
- Backing: 1.5–2.5 mm high-density wood fibre board keeps exit burr below 20 μm.
- Stack flatness: under 0.05 mm across the stack; a warped stack pushes later holes off by more than 30 μm.
5. From drilling to copper plating: the barrel sets the backlight grade
Resin smear left by drilling is an input condition for downstream processes, not a defect that plating can rescue.
- Smear under 10 μm: standard desmear clears it, the three-sided copper wrap at the inner layer is complete, and backlight reaches grade 9 or better.
- Smear above 20 μm: needs aggressive desmear, but glass is then over-etched into a wedge-shaped recession and the plating has nothing to anchor to, dropping backlight below grade 6.
- Hold time: keep drilling-to-plating within 12 hours; oxidized copper dust in the hole activates poorly and produces scattered voids.
- Acceptance: IPC-6012 Class 3 requires barrel roughness of 25 μm average and 38 μm maximum; separation between inner-layer copper and barrel is not permitted, and nail-head distortion must stay within 50% of inner-layer copper thickness.
6. Connect the bit record to lot traceability
When a barrel defect does occur, rework is not the expensive part — not knowing how many panels are affected is. Three records close the loop.
- One code per panel: log bit ID, regrind count and holes already drilled, so an anomaly can be traced back to every panel that bit touched.
- Three-hole first-article section: any change of stack-up, laminate lot or bit lot triggers a first-article section taken at board centre, board edge and an isolated hole.
- Share the board with impedance: put impedance coupons and barrel section samples on the same test board and collect both data sets in one machine pass.
Operated by Shenzhen Lingxin Technology, AIPCB.cc supports up to 44 layers, a maximum panel size of 610×1100 mm, aspect ratios up to 20:1 (25:1 for backplanes), impedance tolerance of ±8% (±10% standard), line-width accuracy of ±8 μm, and copper weight up to 13 OZ, with expedited prototype evaluation available. For engineering and quotations, contact info@ipcba.com.cn or +86 138 2310 9230.
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