Ionic contamination is the defect class most likely to pass inspection and then recur. The conclusion first: treat cleaning as a measurable process metric (≤1.56 μg/cm² NaCl equivalent) rather than as "we washed it", and state the extraction method and per-ion limits on the drawing and in the RFQ. That costs an order of magnitude less than a failure analysis later. High-aspect-ratio holes are where rinse chemistry exchanges worst and where residue concentrates.
Three sources, three consequences
Unpack "dirty" and you find three different process chains:
- Ionic: halides (Cl⁻, Br⁻), sodium and potassium ions, weak organic acids. Under humidity plus bias they drive electrochemical migration and eventually dendritic shorts, typically between adjacent nets at pitches below 0.5 mm.
- Non-ionic: rosin, resin and oil residues. Not conductive themselves, but they degrade conformal-coat adhesion and carbonize in later high-temperature steps, creating leakage paths indirectly.
- Particulate: solder balls, glass-fibre protrusions, solder-mask debris — direct causes of bridging or pad damage.
Only the ionic class is indirectly captured by equivalent-concentration testing, so "cleaning passed" is never a conclusion a single metric can support.
Quantitative acceptance: three tiers
- Board-level equivalent: extraction per IPC-TM-650 2.3.25, expressed as NaCl equivalent. The general limit is ≤1.56 μg/cm²; automotive and medical programs commonly tighten this to ≤0.75 μg/cm².
- Per-ion speciation: ion chromatography quantifies Cl⁻, Br⁻, SO₄²⁻, Na⁺, K⁺ and weak organic acids individually. A sensible internal control is total chloride ≤0.5 μg/cm² and weak organic acids ≤0.3 μg/cm², which localizes the failing rinse stage far better than a single total.
- Electrical performance: surface insulation resistance per IPC-TM-650 2.6.3.7 at 85 °C/85 %RH with 100 VDC bias. A common acceptance band is ≥10⁶ Ω at both initial and 1000 h readings; Class 3 programs often require one to two orders of magnitude more.
The relationship is screening by total, localizing by speciation, confirming by SIR. Releasing on an equivalent-concentration test alone means you only looked at the average.
Process control: five gates that must exist
- After drilling and desmear: hole-to-hole exchange is worst at high aspect ratios, so rinse flow and ultrasonic time must scale with board thickness instead of running one recipe for the whole batch.
- After pattern plating and resist stripping: the step where metal ions and organic residue peak.
- After solder-mask development: developer residue remains at aperture edges as sodium ions.
- After surface finish: OSP and immersion tin are the most residue-sensitive; control final rinse water at conductivity ≤1 μS/cm and resistivity ≥10 MΩ·cm.
- Drying: retained water is the usual reason a board cleans well but still fails, so verify the drying profile on blind and half-hole areas specifically.
Two frequent misconceptions
- No-clean means no cleaning needed. Under J-STD-004, no-clean fluxes split into ROL0 (halides <0.5 %) and ROL1 (0.5 %–2.0 %); ROL1 volatilizes incompletely under BGA bodies and inside shields. Specify ROL0 and write "secondary cleaning required or not" into the process document instead of leaving it to the line.
- The cleaning chemistry becomes the contamination. When saponifiers and surfactants are not rinsed out, the equivalent reading drops while SIR degrades — the case most easily misjudged as compliant.
Four recommendations for engineering and purchasing
- Put three items on the drawing or in the RFQ: extraction method, equivalent limit, and whether speciation data is required. Miss one and accountability disappears.
- Run speciation on both first article and volume lot; do not accept a single pass certificate.
- Write "rinse parameters scale with board thickness and aspect ratio" into the supplier's process control plan.
- For pitches below 0.5 mm under long-term bias, make 1000 h SIR a release gate.
The hard part of ionic cleanliness is not equipment; it is translating "clean enough" into reproducible numbers and traceable records. AIPCB.cc supports up to 44 layers, panel sizes up to 610×1100 mm, heavy copper up to 13 OZ, trace-width accuracy of ±8 μm, impedance tolerance of ±8% (±10% standard), aspect ratios up to 20:1 (25:1 for backplanes), and 24-hour rapid prototyping. For engineering and quotations, contact info@ipcba.com.cn or +86 138 2310 9230.
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