Bottom line first: bow and twist in multilayer boards is not one cause called "the press did not press well" — it is the combined result of stackup symmetry, material expansion and contraction, and the lamination heat profile. Before the design is frozen, do one thing: build the stackup as a mirror-symmetric structure about the centre layer. That single step removes most of the warpage and works far better than baking boards afterwards as a remedy. Write the criterion down as well: boards destined for SMT are usually judged at ≤0.75%, non-SMT boards relaxed to ≤1.5%, and the measurement state must always be stated.
Warpage grows with the square of the board size
For the same internal stress, the larger board shows it more plainly: deflection is proportional to the square of board length. A stackup that is "fine" on a small board can go straight out of tolerance when scaled to a large format such as 610×1100 mm. That is exactly why large high-layer-count boards need a dedicated stackup review — success on a small board cannot simply be extrapolated.
In process terms, FR-4 type materials have a Z-axis coefficient of thermal expansion of about 50–70 ppm/°C below Tg, rising markedly to several hundred ppm/°C once Tg is crossed. Lamination and reflow soldering both cross Tg, and the strain "preset" into the material during heating and cooling ends up as bow under normal conditions.
Stackup symmetry comes first
- Mirror symmetry: mirror about the centre layer so that dielectric thickness, copper thickness, prepreg grade and prepreg sheet count correspond one for one on both sides.
- Residual copper balance: keep the copper coverage of each layer as close as possible, targeting a controllable percentage difference between layers (in practice, within 10%); balance large copper areas against dense routing with thieving copper or cross-hatched copper.
- Material direction: warp and weft shrink differently, so the cutting direction and the panel layout direction must be kept consistent, avoiding a batch in which half the boards run with the grain and half across it.
Lamination and pre-bake are controllable variables
Inner layers must be pre-baked to remove moisture before lamination (commonly at the 150°C level for several hours); otherwise residual moisture vaporises at high temperature, which both causes delamination and worsens warpage. The lamination heat profile should be controlled in stages: a gentle ramp (about 1.5–3.0 °C/min), a hold stage that lets the resin flow and cure fully, and a cooling stage that avoids thermal shock from fast cooling — cool too quickly and the internal stress is frozen into the board.
Insufficient cure is a hidden source: an under-cured board keeps shrinking in later high-temperature processes, so warpage appears "after the fact". The thicker the board and the higher the layer count, the longer heat takes to reach the core from the surface, and the less the profile can be copied from a thin board.
Acceptance has to rest on a reproducible measurement
A warpage figure must state three things: the acceptance limit (for example ≤0.75%), the measurement state (ambient, or after simulated reflow thermal stress) and the measurement method and datum. The conventional method places the board freely on a flat reference surface, measures the maximum gap and divides by the diagonal length to express a percentage. Without a stated measurement state, supplier and buyer each measure a different number and the discussion goes nowhere.
Five workable recommendations
- Fix the stackup before tuning the process: an asymmetric stackup cannot be rescued by press parameters, so make symmetry a hard constraint at review stage.
- Lock the criterion into the specification: limit, measurement state and method all three, to avoid disputes at acceptance.
- Treat the lamination profile as a controlled parameter: ramp, hold and cool in stages, and re-verify whenever material or thickness changes rather than reusing the old curve.
- Review large boards separately: confirm panel layout direction, material direction, border and support together for large-format panels.
- Take data at prototype stage: require measured warpage (as a percentage of the diagonal) on first articles, so the problem surfaces before volume production.
Shenzhen Lingxin Technology's high-end line for AI compute boards covers 1–44 layers, finished copper up to 13oz (18oz maximum base copper on outer layers) and a maximum panel size of 610×1100 mm, with lead times as fast as 24-48 hours, subject to product complexity. For large-format high-layer-count boards, provide the stackup and the warpage acceptance basis together at enquiry stage so that the lamination route can be aligned in one pass.
Send your Gerber files and stackup requirements; a 24-hour expedite channel is available.