Bottom line first: 800V automotive platforms, 1500V photovoltaic and storage PCS, and DC fast charging are pushing PCB from a carrier of signals and control into a structural part that must insulate and conduct. If the purchasing brief still stops at layers, line width and surface finish, the prototype will hit insufficient creepage, thick copper that cannot be etched, and a CAF test that fails. The direction is clear: power boards must be judged on withstand voltage, current-carrying copper and failure life together, not routing capability alone.
Demand side: three lines raise the bar at once
- 800V automotive platforms: paired with SiC devices for lower losses, the main drive bus moves from 400V to the 800V class, with peaks approaching 1000V. Doubling the voltage is not linear — creepage and clearance must be re-read from the tables, and margins copied from an earlier platform are usually short.
- 1500V PV and storage systems: the DC side of string inverters and storage PCS commonly runs at the 1500V level, and outdoor cabinets stay humid — classic CAF territory.
- DC fast charging: the output side is moving toward 800~1000V, so power modules and bus sampling boards need high-voltage isolation and high-current carrying simultaneously.
The common thread is high voltage, high current, long life and outdoor humidity — a combination no consumer PCB acceptance system covers.
Four changes happening on the technical side
1. Thick copper is normal, not a special process. On high-current paths 3~6oz is already the standard range. Thick copper has two knock-on effects: worse lateral etch, making fine lines impossible, and higher resin demand in lamination, risking resin starvation. Line-width capability is therefore not measured on the same scale as an ordinary multilayer.
2. Withstand voltage enters the design rules. Deriving creepage and clearance from IEC 60664-1 by pollution degree and material group is now a mandatory step. FR-4 CTI usually falls in material group IIIa, and when space is compressed the usual answers are slots, cut-outs or a high-CTI material locally rather than a bigger board.
3. Mixed dielectrics and partitioned layouts are more common. The high-voltage zone needs high withstand and low moisture absorption, while the control zone can stay on standard FR-4. Two or more dielectrics in one stackup, and even local metal-base or embedded-copper structures, are clearly increasing, and stackup review complexity rises with them.
4. Reliability shifts from passing a test to surviving the years. A hipot test proves only that the board survives today, not insulation resistance three years out. CAF is a long-cycle mechanism that only a dedicated biased-humidity test exposes — the validation cycle becomes part of the project schedule.
Purchasing: leave the brief unchanged and the rework is guaranteed
- Put reliability clauses in the specification: CAF conditions and pass threshold, ionic contamination ceiling and minimum hole copper must all appear in it. Without these three, suppliers default to a consumer reading, and the gap between a passing prototype and a failing lot opens here.
- State working voltage and long-term environment: fill bus voltage, peak voltage, ingress protection and expected service humidity into the RFQ — they drive material choice and whether CAF validation is mandatory.
- Ask for the creepage calculation basis: do not accept "we left 1 mm from experience"; require a table by pollution degree and material group showing how drilling and slots contribute.
- Audit the process package, not the brochure: thick-copper plating uniformity, deep-hole plating, in-house insulation test and biased-humidity chambers, plus independent ionic contamination measurement.
- Book capacity early: etching, lamination and inspection of thick-copper boards run slower than standard multilayer, and CAF validation itself needs 500~1000 h, so two weeks before mass production is too late. Ask suppliers to declare their manufacturability envelope (minimum spacing, maximum copper, maximum board thickness) at quotation; the same drawing does not have the same process window on every line.
Implementation checklist
- Design side: mark high-voltage nets, set working voltage, read creepage from the tables, buy margin with slots, spread glass and angled routing, and only then discuss layer count and copper weight; in high-voltage areas prefer Tg ≥ 170 °C, low-absorption laminates.
- Purchasing side: write four families of requirement into the technical agreement — electrical, structural, reliability and cleanliness — and agree sampling frequency; section and measure ionic contamination on first article, then run biased humidity plus thermal cycling on the pilot lot.
The competitive point in power electronics PCB is moving from who etches the finest line to who pushes high-voltage failure probability down to an acceptable level. For a buyer, the most valuable step is not price pressure but writing reliability requirements into the RFQ up front, which decides between smooth production and a six-month rework loop. Put bus and peak voltage, the creepage table, the CAF condition and threshold, the ionic contamination limit, the minimum hole copper and the thick-copper capability envelope into the quotation document, and make first-article cross-sectioning plus biased-humidity testing the acceptance gate. Shenzhen Lingxin Technology's high-end line for AI compute covers 1–44 layers, finished copper up to 13oz (18oz outer base copper maximum), a maximum size of 610×1100 mm and a metal-base dielectric thermal conductivity of 2–12 W/m·K, with lead times as fast as 24-48 hours, actual timing depending on product complexity; send working voltage, long-term humidity and target life with the enquiry so material and process route lock in one pass.
Send your Gerber files and stackup requirements; a 24-hour expedite channel is available.