Bottom line first: AI data-centre power architecture is moving from the traditional low-voltage DC bus towards higher-voltage DC distribution, and the direct consequence is that on-board current density and thermal pressure rise together, which redefines the demand structure for copper thickness, embedded copper and layer count. For PCB procurement and design this is not a linear "the thicker the better" upgrade: structure, heat path and material planning all have to be re-sequenced at the same time.
How the current shift reaches board level
Raising the bus voltage means lower current for the same power, but the board still has to carry distribution currents in the hundreds of amperes, and the transient response demanded on the processor side sits on top of that, so the current-carrying margin in power planes and busbar areas is being re-evaluated. There are three common structural responses.
- Thick copper on the outer layers: moving from a conventional 1 oz up to 3–6 oz, which enlarges the conducting cross-section directly.
- Copper blocks / copper inserts: embedding copper in local high-current areas, which raises equivalent thermal conductivity and heat capacity markedly.
- More layers: paralleling power planes across several layers to spread current density, while providing more copper area for heat removal.
The three routes can be stacked, and their price is etch difficulty, lamination flatness, and layer count and cost respectively. That is also why capability figures such as "up to 44 layers" are mentioned so often for AI power board types.
The real threshold in thick copper is a narrowed process window
Thick-copper boards run into two process points that cannot be avoided. The first is etch undercut: the thicker the copper, the more obvious the deviation between the actual line width after etching and the design value, so the design has to be aligned with the fabricator's line-width accuracy (we hold ±8 μm). The second is resin fill: the thicker the copper, the more irregular the space that has to be filled between layers, and insufficient fill leaves voids between copper lines that directly affect withstand voltage and thermal-cycle life. When a design asks for the combination of "thick copper + high Tg + low loss", lamination and fill capability must be confirmed at the same time; otherwise a passing prototype followed by a falling mass-production yield is the normal outcome.
Procurement cadence: move the long lead-time items to the front
- Thick-copper laminates and copper blocks are lead-time-sensitive materials, so lock the specification at project kickoff and reserve a window for qualifying alternates; do not wait until routing is finished before starting material planning.
- Do not lock a project to a single part number: high-Tg mid-loss materials have some interchangeability between vendors, and completing stackup and impedance qualification for 1–2 alternates in advance allows a fast switch when lead times move.
- Give thermal conclusions to the board shop early: whether the thermal pad is flush or recessed, the copper block position and keep-out area, and the fill method in high-current areas are far cheaper to raise at DFM stage than to change after volume production starts.
Where the trend goes, and what to do about it
What can be expected is that the advance of AI servers and high-voltage DC power architecture will keep pushing the combined requirement of "high current + high heat dissipation + high reliability" towards high-end board capacity, while utilisation at mid and low-end capacity improves only marginally, so the structural split will continue. The recommendation for buyers is to extend supplier evaluation from "minimum line width / minimum hole size" to "thick-copper capability, copper insert process, thermal-electric separation structures and mass-production yield data". The recommendation for designers is to fix the power architecture and the copper thickness budget at schematic stage, rather than discovering at routing time that the power planes are not enough.
Feasibility reviews for thick copper, embedded copper, metal-base and thermal-electric separation structures can be completed in a single pass before prototyping. AIPCB.cc supports a maximum panel size of 610×1100 mm, up to 44 layers and 20:1 aspect ratios (25:1 for backplanes), and a 24H expedited prototyping channel is available. Engineering and quotation: info@ipcba.com.cn, phone +86 138 2310 9230.
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